orcia*Desktop ddr3 1gb memory module\hynix chips\lower price\8bits

orcia*Desktop ddr3 1gb memory module\hynix chips\lower price\8bits
 

Product description:

Quick Details

  • Products Status: Stock
  • Application: Desktop
  • Memory Capacity: 1GB
  • Type: DDR3
  • Frequency: 1333MHz
  • Brand Name: OEM
  • Model Number: PC-DDR3 1GB 1333MHz
  • Place of Origin: Guangdong, China (Mainland)
  • Fuction: 8 bits/ compatible with all boards
  • Advantage: OEM; Stable; compatibility; Long life
  • Board: Wide/ narrow
  • Chip: Original Micron
  • Voltage: 1.5V

Packaging & Delivery

Packaging Details: bulk or retail packing; brand package; box package
Delivery Detail: 3working days

Specifications

*orcia*Desktop ddr3 1gb memory module/ hynix chips/ lower price/ 8bits
1. Fully compatible
2. Reasonable MOQ; Discount offered

*orcia*Desktop ddr3 1gb memory module/ hynix chips/ lower price/ 8bits

High quality and competitive price.

All products are subject to stringent packaging.

Product Description

MT-DDR3 10600-1GB

Storage Capacity

1GB

Upgrade Type

Generic

Type

DDR3

Techonogy

DDR3

Form Factor

DIMM 240-PIN

Memory Speed

1333MHZ (PC10600)

CAS Latency

CL7

Data Integrity Check

Non-ECC

RAM Features

Unbuffered

Module Configuration

128*8

Supply Voltage

1.5V

Compatible Slots

1*memory

Warranty

1 years

desktop memory ram ddr3 4gb 1333mhz/ best quality

1) DDR 400/333 & DDRII 533/667/800 MHz
2) 168/184/240-pin socket type dual in line memory module (DIMM)
3) 2.6V power supply
4) Data rate: 400/333/533/667/800Mbps (max)
5) 2.5 V (SSTL-2 compatible) I/ O for DDR I products, 1.8Vpower supply for DDR II products
6) Double-data-rate architecture, two data transfers per clock cycle
7) Bi-directional, differential data strobe (DQS) is transmitted/ received with data, to be
used in capturing data at the receiver
8) Data inputs and outputs are synchronzed with DQS.
9) DQS is edge aligned with data for read, center aligned with data for write.
10) Differential clock inputs (CK and CK)
11) DLL aligns DQ and DQS transitions with CK transitions.
12) Commands entered on each positive CK edge: Data and data mask referenced to
both edges of DQS.
13) Four internal banks for concurrent operation (component)
14) Data mask (DM) for write data.
15) Auto precharge option for each burst access
16) Programmable burst length: 2, 4, 8
17) Programmable/ CAS latency (CL) : 3
18) Programmable output driver strength: Normal/ weak
19) Refresh cycles: (8192 refresh cycles/ 64ms) .
20) 7.8US maximum average periodic refresh interval.
21) Posted CAS by programmable additive latency for better command and data bus
efficiency
22) Off-chip-driver impedance adjustment and on-die-termination for better signal quality .
23) DQS can be disabled for single-ended data strobe operation
24) 2 variations of refresh
25) Auto refresh
26) Self refresh
ddr2 ram memory 2gb.